Datasheet
Table Of Contents
- Description
- Features
- Ordering Information
- Key Parameters
- Speed Grade
- Address Table
- Pin Descriptions
- Input/Output Functional Descriptions
- Pin Assignments
- Registering Clock Driver Specifications
- On DIMM Thermal Sensor
- Functional Block Diagram
- 4GB, 512Mx72 Module(1Rank of x8)
- 8GB, 1Gx72 Module(1Rank of x4) - page1
- 8GB, 1Gx72 Module(1Rank of x4) - page2
- 8GB, 1Gx72 Module(2Rank of x8) - page1
- 8GB, 1Gx72(2Rank of x8) - page2
- 16GB, 2Gx72 Module(2Rank of x4) - page1
- 16GB, 2Gx72 Module(2Rank of x4) - page2
- 16GB, 2Gx72 Module(2Rank of x4) - page3
- 32GB, 4Gx72 Module(4Rank of x4) - page1
- 32GB, 4Gx72 Module(4Rank of x4) - page2
- 32GB, 4Gx72 Module(4Rank of x4) - page3
- 32GB, 4Gx72 Module(4Rank of x4) - page4
- 32GB, 4Gx72 Module(4Rank of x4) - page5
- Absolute Maximum Ratings
- AC & DC Operating Conditions
- AC & DC Input Measurement Levels
- Vref Tolerances
- AC and DC Logic Input Levels for Differential Signals
- Differential signal definition
- Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)
- note : Rising input differential signal shall become equal to or greater than VIHdiff(ac) level and Falling input differential signal shall become equal to or less than VIL(ac) level.
- Single-ended requirements for differential signals
- Differential Input Cross Point Voltage
- Slew Rate Definitions for Single-Ended Input Signals
- Slew Rate Definitions for Differential Input Signals
- AC & DC Output Measurement Levels
- Overshoot and Undershoot Specifications
- Refresh parameters by device density
- Standard Speed Bins
- Environmental Parameters
- IDD and IDDQ Specification Parameters and Test Conditions
- IDD Specifications (Tcase: 0 to 95oC)
- Module Dimensions
Rev. 1.0 / May. 2014 36
AC & DC Output Measurement Levels
Single Ended AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Notes:
1. The swing of ±0.1 x V
DDQ
is based on approximately 50% of the static single ended output high or low swing with
a driver impedance of 40Ω and an effective test load of 25Ω to V
TT
= V
DDQ
/ 2.
Differential AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Notes:
1. The swing of ±0.2 x V
DDQ
is based on approximately 50% of the static differential output high or low swing with
a driver impedance of 40
Ω and an effective test load of 25Ω to V
TT
= V
DDQ
/2 at each of the differential outputs.
Single-ended AC and DC Output Levels
Symbol Parameter
DDR3-800, 1066,
1333, 1600, 1866
Unit Notes
V
OH(DC)
DC output high measurement level (for IV curve linearity)
0.8 x V
DDQ
V
V
OM(DC)
DC output mid measurement level (for IV curve linearity)
0.5 x V
DDQ
V
V
OL(DC)
DC output low measurement level (for IV curve linearity)
0.2 x V
DDQ
V
V
OH(AC)
AC output high measurement level (for output SR)
V
TT
+ 0.1 x V
DDQ
V1
V
OL(AC)
AC output low measurement level (for output SR)
V
TT
- 0.1 x V
DDQ
V1
Differential AC and DC Output Levels
Symbol Parameter
DDR3-800, 1066,
1333, 1600, 1866
Unit Notes
V
OHdiff (AC)
AC differential output high measurement level (for output SR)
+ 0.2 x V
DDQ
V1
V
OLdiff (AC)
AC differential output low measurement level (for output SR)
- 0.2 x V
DDQ
V1