Datasheet

ManualsBrandsHynix Manualscomputer componentsHMT351S6CFR8C-H9

Table Of Contents

Description
Fetures
Ordering Information
Key Parameters
Speed Grade
Address Table
Pin Descriptions
Input/Output Functional Descriptions
Pin Assignments
Functional Block Diagram
- 2GB, 256Mx64 Module(1Rank of x8)
- 4GB, 512Mx64 Module(2Rank of x8)
Absolute Maximum Ratings
- Absolute Maximum DC Ratings
- DRAM Component Operating Temperature Range
AC & DC Operating Conditions
- Recommended DC Operating Conditions
AC & DC Input Measurement Levels
- AC and DC Input Levels for Single-Ended Command and Address Signals
- AC and DC Input Levels for Single-Ended Signals
Vref Tolerances
AC and DC Logic Input Levels for Differential Signals
- Differential signal definition
- Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)
- Single-ended requirements for differential signals
- Differential Input Cross Point Voltage
- Slew Rate Definitions for Single-Ended Input Signals
- Slew Rate Definitions for Differential Input Signals
AC & DC Output Measurement Levels
- Single Ended AC and DC Output Levels
- Differential AC and DC Output Levels
- Single Ended Output Slew Rate
- Differential Output Slew Rate
- Reference Load for AC Timing and Output Slew Rate
Overshoot and Undershoot Specifications
- Address and Control Overshoot and Undershoot Specifications
- Clock, Data, Strobe and Mask Overshoot and Undershoot Specifications
Refresh parameters by device density
Standard Speed Bins
- DDR3-800 Speed Bins
- DDR3-1066 Speed Bins
- DDR3-1333 Speed Bins
- DDR3-1600 Speed Bins
- Speed Bin Table Notes
IDD and IDDQ Specification Parameters and Test Conditions
IDD Specifications (Tcase: 0 to 95oC)
- 2GB, 256M x 64 SO-DIMM: HMT325S6CFR8C
- 4GB, 512M x 64 SO-DIMM: HMT351S6CFR8C
Module Dimensions
- 256Mx64 - HMT325S6CFR8C
- 512Mx64 - HMT351S6CFR8C

Rev. 1.0/Sep. 2012 25

Reference Load for AC Timing and Output Slew Rate

Figure below represents the effective reference load of 25 ohms used in defining the relevant AC timing

parameters of the device as well as output slew rate measurements.

It is not intended as a precise representation of any particular system environment or a depiction of the

actual load presented by a production tester. System designers should use IBIS or other simulation tools to

correlate the timing reference load to a system environment. Manufacturers correlate to their production

test conditions, generally one or more coaxial transmission lines terminated at the tester electronics.

Reference Load for AC Timing and Output Slew Rate

DUT

DQS

VDDQ

25 Ohm

VTT = VDDQ/2

CK, CK