HP integrated VMware ESXi 5.0 U1 June 2012 Datasheets

HP Insight Management WBEM CPU Provider Overview 9
Property Name
Property Implementation
CoreEnabledState
2 (Core Enabled)
Characteristics
For x86 processors:
Characteristics[0]:
3 (32-bit Capable)
For x64 processors:
Characteristics[0]:
3 (32-bit Capable)
Characteristics[1]:
2 (64-bit Capable)
HP_ProcessorCore
Bootstrap
FALSE
TRUE
SMX_ProcessorCore
1-2-4 SMX_HardwareThread Class
The SMX_HardwareThread class extends the CIM_HardwareThread class to model the hardware
threads.
The following table lists the properties implemented.
Property Name
Property Implementation
CIM_ManagedElement
Caption
Processor:<p> Core:<c> Thread:<t>
Where: <p> is the processor number, <c> is the core number, and <t>
is the thread
number
Description
<processor brand string> (<cpu> Family <x> Model <y> Stepping
<z> Processor:<p> Core:<c> Thread:<t>)
Where: <processor brand string> is the processor brand string, (<cpu> is
the cpu architecture type, <x> is the processor family number, <y> is the processor
model number and <z> is the processor stepping number, <p> is the processor
number, <c> is the core number, and <t> is the thread number.
For example:
Intel(R) Xeon(TM) CPU 3.06GHz (x86 Family 15 Model 2 Stepping