Programming instructions

60 Chapter 3
Troubleshooting
Selftest Failures
WRN 4
n
01 SYS BD CPU n skip lst
CPU n is bypassing its late self-tests to
save time.
TST 4
n
0E SYS BD CPU
n exit lst
CPU n finished its late self-tests.
TST 4
n
20 SYS BD CPU n lst erly st
CPU n is re-executing some of its early
self-tests from system memory.
TST 4
n
21 SYS BD CPU
n lst basic
CPU n is re-executing its basic operations
self-test.
TST 4
n
22 SYS BD CPU
n lst alu
CPU n is re-executing its arithmetic and
logic unit self-test.
TST 4
n
23 SYS BD CPU
n lst branch
CPU n is re-executing its branch
instruction self-test.
TST 4
n
24 SYS BD CPU
n lst arth cd
CPU n is re-executing its arithmetic
conditions self-test.
TST 4
n
25 SYS BD CPU
n lst bit ops
CPU n is re-executing its bit operations
self-test.
TST 4
n
26 SYS BD CPU
n lst ctl reg
CPU n is re-executing its control register
self-test.
TST 4
n
27 SYS BD CPU
n lst ext int
CPU n is re-executing its external
interrupt self-test.
TST 4
n
28 SYS BD CPU
n lst itimer
CPU n is re-executing its interval timer
self-test.
TST 4
n
29 SYS BD CPU
n lst mltimed
CPU n is re-executing its multi-media
instructions self-test.
TST 4
n
2A SYS BD CPU
n lst shadow
CPU n is re-executing its shadow register
self-test.
TST 4
n
2B SYS BD CPU
n lst dg regs
CPU n is re-executing its diagnose
register self-test.
TST 4
n
2C SYS BD CPU
n lst rdrs
CPU n is re-executing its remote diagnose
register self-test.
TST 4
n
2D SYS BD CPU
n lst bypass
CPU n is re-executing its integer bypass
operation self-test.
TST 4
n
30 SYS BD CPU
n cache byte
CPU n is starting its data cache sub-word
operations self-test.
TST 4
n
40 SYS BD CPU
n cache flush
CPU n is starting its cache flush self-test.
TST 4
n
50 SYS BD CPU n icache miss
CPU n is starting its instruction cache
miss self-test.
Table 3-2. Chassis Codes for the B2000 Workstation
Ostat Code FRU Message
Description