Specifications

highly reliable ASICs
The backplane ASIC is manufactured and tested with a process that results in 10X demonstrated
reliability over comparable chips. This reliability results in virtually zero backplane ASIC failures
in the field.
redundant dc–dc converters
The dc-dc converters that power the backplane chips are fully redundant, reducing downtime
associated with power conversion. (Power conversion is normally a significant contributor to
failure rate.)
full end-to-end error correction and independent-partition design
The backplane is built from a single crossbar with point-to-point connections. Traffic within a
partition is contained to that partition, so there is no sharing of links in a properly configured
system. Each port of the crossbar chip is fully independent, allowing cells of different partitions to
coexist without affecting each other in any way. In other bus-based systems, all domains
participate in the coherency scheme and share address buses. Therefore, in these systems all
domains are linked in some fashion, resulting in shared failure modes that might crash multiple
partitions.
Also, unlike other snoopy coherency systems that must accept and respond to all coherency
requests from all domains, rp8400 partitions have hardware firewalls dedicated to guarding
partitions from errant transactions generated on failing partitions. A failure in one rp8400
partition will not affect any other partitions.
Finally, all data paths in the fabric are resistant to both random single-bit errors and persistent
single-wire “stuck-at” faults. Therefore, the fabric is resilient to any single-bit failure, including pin,
connector, or solder problems.
reliability in the cabinet
In keeping with its focus on maintaining high availability (HA), the rp8400 includes protection
infrastructure
against failure within the cabinet infrastructure. The HA features in this area include:
• true dual ac line cord support
• complete resilience to service processor failures
dual ac line cord support
As described earlier in this paper, the rp8400 server can run on one or two totally independent
power sources. Moreover, these two power sources don’t need to be in phase.
resilience to service processor failures
The rp8400 hardware has been designed to enable service processor failover when redundant
core I/O cards are in place. Future firmware and manageability code releases will allow a slave
service processor to take over for a failed master and will also enable a resilient console (on
reboot). Future OS releases may allow the console to fail-over as well.
serviceability
HP continues to make great strides in implementing features that reduce the time to upgrade
components or diagnose and repair component failures. The rp8400 server was designed with
the objective of coupling state-of-the-art diagnostic tools with hardware features to virtually
eliminate unplanned downtime. Hot-swap/-plug technology is implemented throughout the server,
allowing addition or replacement of components while the system continues to run.
For components that cannot be serviced while the server is running, the rp8400 was designed to
provide access and removal of any field-replaceable unit (FRU) within 15 minutes or less. In
addition, the rp8400 server is loaded with design innovations that greatly simplify servicing.
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