Specifications

I/O subsystem
The I/O subsystem is the third basic building block of the rp8400. Components within the I/O
subsystem are the I/O controllers, internal peripheral bay, and multifunction core I/O. Figure 10
shows the basic block diagram of the I/O subsystem.
figure 10. Basic block diagram of the rp8400 I/O subsystem.
I/O controller chips
The rp8400 contains two master I/O controller chips located on the PCI backplane. Each I/O
controller contains 16 high-performance, 12-bit-wide links; these links connect to 16 slave I/O
controller chips supporting the PCI card slots and core I/O.
In the rp8400, two links—one from each master controller—are routed through the crossbar
backplane and are dedicated to core I/O. The remaining 30 links are divided among the sixteen
“4X” 66-MHz x 64-bit PCI card slots
*, with each slot on a PCI bus by itself. This one-card-per-bus
architecture leads to greater I/O performance, better error containment, and higher availability.
Each controller chip is also directly linked to a host cell board. This means that at least two cell
boards, located in cell slots 0 and 1, must be purchased in order to access all 16 I/O card slots.
(With one cell board, access to eight slots is enabled.)
core I/O boards
The rp8400 can be purchased with either one or two core I/O boards. The core I/O boards are
identical and provide console, SCSI, serial, and management processor functionality. If you opt
for the second core I/O board, it can be used to enable dual partitioning in the rp8400 and
provide access to a second set of disk drives and removable-media devices.
The internal peripheral bay is divided into two identical halves. Each half supports up to two low-
profile disks and one removable-media device. A SCSI controller chip located on each core I/O
board supports each half of the internal peripheral bay. (This means that you must have both core
I/O boards in order to access both halves of the peripheral bay.)
PCI backplane
Figure 11 shows a more detailed view of the PCI backplane. Note that 14 of the 16 I/O card
slots are supported by dual high-performance links. These dual-link I/O slots are called “twin-
turbo” slots because both links operate at turbo speeds—that is, each offers 265 MB/s of
bandwidth—providing a maximum of 530 MB/s (peak) bandwidth for the slot. The remaining two
I/O slots are single links and are designated as “turbo slots.” Aggregate I/O slot bandwidth is
8.5 GB/s.
Every PCI slot in the rp8400 is capable of running at 66 MHz x 64 bits—known as “4X” PCI by
HP. This means that each rp8400 I/O slot will allow the industry’s highest-performing PCI cards to
run at their maximum design speed.
* 66-MHz x 64-bit slots are known as “4X” slots.
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