White Paper

9
Support of PCI/PCI-Express Error Handling and Error
Recovery on HP-UX
PCI error handling and error recovery are supported only with some HP-UX version, I/O products and
servers. For more information, see the support matrix available at the following location:
http://www.hp.com/go/hpux-networking-docs under HP-UX 11i v3 I/O Cards category.
There are several kernel tunables that can change the behavior of PCI error recovery operation. For
more information about the kernel tunables, see Tunable Kernel Parameters section in the PCI Error
Recovery Product Note, 4
th
Edition, March 2010 document, posted at the following location:
http://www.hp.com/go/hpux-networking-docs under HP-UX 11i v3 I/O Cards category.
The above link provides information about PCI Error Recovery functionality, which is supported on HP-
UX 11i v3 system.
For more information about the type of errors and corresponding events supported by the product on
all platforms, see PCI / PCIe Error Recovery Product Note available at
http://www.hp.com/go/hpux-networking-docs under HP-UX 11i v3 I/O Cards category.
Summary
The basic RAS features designed for HP Integrity and HP 9000 servers, when coupled with the PCI
error handling and recovery mechanisms, enables high-end servers to meet the needs of a
mission-critical environment. This is made possible by preventing customers from experiencing
down-time as a result of system hang or unusable state of a system.
References
For more information about Error Handling functionality supported on HP-UX 11i v2 system, see PCI
Error Handling Product Note 3rd Edition, at the following location:
http://www.hp.com/go/hpux-networking-docs under HP-UX 11i v2 I/O Cards
Glossary
Following is a list of terms used throughout this document:
Name Definition
LBA Local Bus Adapter
EBA Express Bus Adapter
Machine Check Highest Priority interruption on ItaniumĀ® based
Abort (MCA) / systems (MCA) and on PA-RISC based systems
HPMC (HPMC).
PIO Programmable IO
PCI Peripheral Component Interconnect
HardFail mode The mode of operation of LBA, during which PCI
errors cause an HPMC/MCA for fatal error
during PIO read.