Overview of the Visualize fx graphics

29
May 1998 • The Hewlett-Packard JournalArticle 4 • 1998 Hewlett Packard Company
Figure 1
A chip-level diagram of the VISUALIZE fx
6
product.
200 MHz/
41 Bits
200 MHz/
33 Bits
Up to 8
Geometry
Chip
Geometry
Chip
Geometry
Chip
Interface
Chip
PCI2.1
66 MHz/
64 Bits
Geometry Accelerator
Raster
Chip
Host
SGRAM SGRAM SGRAM SGRAM
Rasterizer
Frame Buffer RAM
Texture
Chip
Texture
Chip
SDRAM SDRAM
Texture Accelerator
Texture Cache RAM
Filtered Texture Data
200 MHz/41 Bits
Video
Chip
Video Control Bus
RGB
Video
Data
Video Refresh Data
Interface Chip
• I/O Buffering
• 3D Geometry Workload Distribution
and Concentration
• 2D and 3D Data Path Arbitration
• 2D Acceleration
• YUV to RGB Conversion Support
• Pixel Level Pan and Zoom
• Pixel Level Image Rotations
Geometry Chip
• 3D Geometry and Lighting Acceleration
Texture Chip
• Texture Rasterization
• Texture Map Cache Controller
• Texture Memory Control
• Texture Interpolation
Raster Chip
• Fragment Processing
• Frame Buffer Control Functions
Video Chip
• Color Lookup Tables
• Video Timing
• Digital-to-Analog Conversion
• Video-Out Data
Raster
Chip
Raster
Chip
Raster
Chip
Interface Chip
The interface chip provides a PCI 2.1 (also referred to as
PCI 2X) compliant interface.
*
It operates at up to 66 MHz
in 64-bit mode. Special efforts have been made in the
* PCI + Peripheral Component Interconnect.
design of the buffering and the interface to the PCI. As a
result, the driver is able to sustain writes of 3D geometry
commands to the PCI at almost the theoretical maximum
rates that could be computed for the PCI. The article on
page 51 discusses PCI capability.