HP-UX Virtual Partitions Administrator Guide (includes A.05.09) (5900-2188, March 2012)
The hardware paths for the sibling pairs are:
0/10 and 0/11
0/12 and 0/13
0/14 and 0/15
0/16 and 0/17
After vPars is installed, you can also use the vPars Monitor’s scan command to show hardware
paths.
MON> scan
0 CELL sv_model=172 HPA=0xfffffffffc000000 VPAR=ALL
0/0 BUSCONV sv_model= 12 HPA=0xffffff8020000000 VPAR=ALL
0/0/0 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010000000 VPAR=vpar1
0/0/1 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010002000 VPAR=vpar1
0/0/2 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010004000 VPAR=NONE
0/0/4 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010008000 VPAR=NONE
0/0/6 BUS_BRIDGE sv_model= 10 HPA=0xffffff801000c000 VPAR=NONE
0/0/8 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010010000 VPAR=vpar4
0/0/10 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010014000 VPAR=vpar2
0/0/12 BUS_BRIDGE sv_model= 10 HPA=0xffffff8010018000 VPAR=NONE
0/0/14 BUS_BRIDGE sv_model= 10 HPA=0xffffff801001c000 VPAR=vpar3
0/5 MEMORY sv_model= 9 HPA=0xfffffffffc016000 VPAR=ALL
0/10 NPROC sv_model= 4 HPA=0xfffffffffc070000 VPAR=vpar2
0/11 NPROC sv_model= 4 HPA=0xfffffffffc071000 VPAR=vpar3
0/14 NPROC sv_model= 4 HPA=0xfffffffffc078000 VPAR=vpar4
0/15 NPROC sv_model= 4 HPA=0xfffffffffc079000 VPAR=SHARED
1 CELL sv_model=172 HPA=0xfffffffffc080000 VPAR=ALL
1/0 BUSCONV sv_model= 12 HPA=0xffffff8120000000 VPAR=ALL
1/0/0 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110000000 VPAR=vpar1
1/0/1 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110002000 VPAR=vpar1
1/0/2 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110004000 VPAR=vpar4
1/0/4 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110008000 VPAR=NONE
1/0/6 BUS_BRIDGE sv_model= 10 HPA=0xffffff811000c000 VPAR=vpar2
1/0/8 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110010000 VPAR=NONE
1/0/10 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110014000 VPAR=vpar3
1/0/12 BUS_BRIDGE sv_model= 10 HPA=0xffffff8110018000 VPAR=vpar1
1/0/14 BUS_BRIDGE sv_model= 10 HPA=0xffffff811001c000 VPAR=NONE
1/5 MEMORY sv_model= 9 HPA=0xfffffffffc096000 VPAR=ALL
1/6 IPMI sv_model=192 HPA=0xfffffffc300c0000 VPAR=ALL
1/10 NPROC sv_model= 4 HPA=0xfffffffffc0f0000 VPAR=vpar1
1/11 NPROC sv_model= 4 HPA=0xfffffffffc0f1000 VPAR=SHARED
1/14 NPROC sv_model= 4 HPA=0xfffffffffc0f8000 VPAR=SHARED
1/15 NPROC sv_model= 4 HPA=0xfffffffffc0f9000 VPAR=SHARED
where the following CPU pairs are siblings:
• CPU 1/10 (owned by vpar1) and CPU 1/11 (unassigned)
• CPU 0/10 (owned by vpar2) and CPU 0/11 (owned by vpar3)
• CPU 0/14 (owned by vpar4) and CPU 0/15 (unassigned)
• CPU 1/14 (unassigned) and CPU 1/15 (unassigned)
CPU: CPU Monitor (Formerly Known As LPMC Monitor)
The CPU Monitor (a part of the diagnostic tool Event Monitor Services (EMS) and not a part of the
vPars Monitor) is designed to monitor cache parity errors within the CPUs on the system. With its
Dynamic Processor Resilience (DPR), if the CPU Monitor detects a pre-determined number of errors,
the CPU Monitor will deactivate a CPU for the current boot session. If the problems are severe
enough, the CPU Monitor will deconfigure the socket for the next boot of the system.
Deactivation of a CPU means that the OS will attempt to no longer use the CPU by migrating all
threads off the CPU. Deactivation of a CPU is not persistent across an OS or system reboot.
CPU: CPU Monitor (Formerly Known As LPMC Monitor) 223