HP-UX Floating-Point Guide

228 Glossary
Glossary
floating-point status register A
register in the floating-point
unit (FPU) on PA systems that
controls the arithmetic rounding
mode, controls the underflow
mode (on many systems), enables
user-level traps, indicates
exceptions that have occurred,
indicates the result of a
comparison, and contains
information to identify the
implementation of the floating-
point unit.
floating-point unit (FPU) A
coprocessor that performs IEEE
floating-point operations on PA-
RISC systems. Also called the
floating-point coprocessor.
floor The floor of a value is the
greatest whole number less than
that value. See also ceiling.
flush-to-zero mode On some
systems, a method of handling
underflow conditions in which
the hardware simply substitutes a
zero for the result of an operation
that underflows, with no fault
occurring. (Normally, an
underflow involves a fault into the
kernel, where the IEEE-754-
specified conversion of the result
into a denormalized value or
zero is accomplished by software
emulation.)
FMA Fused Multiply-Add, a kind
of instruction that combines a
multiplication and an addition into
a single operation. Also called
FMAC (floating-point multiply
accumulate).
fraction In a floating-point
representation, the bits that for
normalized values represent a
value between 1.0 and 2.0 that is
raised to a power of 2. See also
exponent, sign bit.
fraction implicit bit In a
floating-point representation, the
bit in the fraction that would
represent 1.0. Since this bit would
always be set, it is not included in
the actual format, but it is implied.
hidden bit See fraction
implicit bit.
IEEE standard The IEEE
Standard for Binary Floating-
Point Arithmetic (ANSI/IEEE Std
754-1985), which defines
specifications for representing and
manipulating floating-point
values so that programs written on
one IEEE-conforming machine
can be moved to another
conforming machine with
predictable results. The
international version of the IEEE