HP-UX Floating-Point Guide

188 Chapter 7
Performance Tuning
Cache Aliasing
Table 7-1 Typical Instruction Cache Aliasing Situation
Detecting problems with instruction cache aliases is an inexact process
because the system does not keep records of cache hits and misses. You
may notice, after making some modifications to one piece of code, that a
seemingly unrelated routine runs more slowly than before. This can
happen if your modifications change the virtual address map of your
program and cause increased cache aliasing occurrences. Or you may
suspect that a routine is running much more slowly than it should.
Fixing instruction cache problems is also difficult because you do not
have much control over what virtual addresses are assigned to data and
instructions. However, you can move routines around within a source
module, and you can change the order in which object modules are joined
by the linker. There are no hard and fast rules about how the linker
orders various data and text sections, but it tends to place them in the
same order in which you list them in the compiler or ld command line.
You can take advantage of this fact by reordering the modules on the
command line.
Code Description Address
DO 10 I = 1,1000
CALL subr1
CALL subr2
10 CONTINUE
END
Main
program loop
SUBROUTINE subr1
.
.
RETURN
END
First
subroutine
P
P+L1
(L1 = length of
subr1 code)
SUBROUTINE subr2
.
.
RETURN
END
Second
subroutine
Q
Q+L2
(L2 = length of
subr2 code)