HP MLIB User's Guide Vol. 1 7th Ed.

Chapter 1 Introduction to VECLIB 17
Optimization
SUBROUTINE mlib_routine(...)
ENTRY mlib_routine_(...)
...
And a C version might be:
#undef mlib_routine
#undif mlib_routine_
void mlib_routine (...){
...
}
void mlib_routine_(...){
mlib_routine(...);
}
Optimization
The key computational kernels in VECLIB have been optimized to take full
advantage of both PA-RISC and Itanium tightly integrated architectures.
Optimizations include:
• Instruction scheduling to maximize the number of machine instructions
executed per clock cycle
• Algorithm restructuring to increase the number of computations per
memory access
• Cache management to decrease the number of data cache misses
Refer to “Accessing VECLIB” on page 3 for instructions on linking the desired
library with your program.
Parallel processing
Parallel processing is available on multi-processor HP platforms running the
HP-UX 11i or greater operating system and Linux. These systems can divide a
single computational process into small streams of execution, called threads.
The result is that you can have more than one processor executing on behalf of
the same process. Also, refer to Appendix C, “Parallelized Subprograms,” for a
list of HP VECLIB parallelized subprograms.