caliper.1 (2010 09)

c
caliper(1)
Integrity Systems
caliper(1)
(Requires Optional HP Caliper Software)
c2c Provides metrics related to cache coherence activity. Not available on quad-core
processors.
cpi Provides metrics related to Cycles Per Instruction (CPI)
cpubus Provides information on the demand that a specific CPU presents to the CEC chip
set, and the demand the CPU experiences due to the CEC traffic initiated by other
CPUs or I/O components in the system. Not available on quad-core processors.
cspec Provides metrics on the effectiveness of control speculation.
dispersal Provides qualitative view of the parallelism that is available as seen at instruction
dispersal.
dspec Provides metrics on the effectiveness of data speculation.
l1dcache Provides miss rate information for the L1 data cache.
l1icache Provides miss and prefetch usage information for the L1 instruction cache.
l2cache Provides miss rate information for the L2 unified cache. Not available on dual-core
Itanium 2 and new quad-core processors.
l2dcache Provides miss rate information for the L2 data cache. Only available on dual-core
Itanium 2 and quad-core processors.
l2icache Provides miss rate information for the L2 instruction cache. Only available on
dual-core Itanium 2 and quad-core processors.
l3cache Provides miss rate information for the L3 unified cache.
memreq Provides data about memory read latency, cacheable and uncacheable memory
requests. Only available on quad-core processors.
overview Provides an overview of processor activity by collecting multiple event sets.
On non-dual-core Itanium 2 processors, the event sets used are:
cpi, stall,
dispersal, l1dcache, l1icache, l2cache, tlb, fp.
On dual-core Itanium 2 and quad-core processors, the event sets used are:
cpi,
stall, dispersal, l1dcache, l1icache, l2dcache, l2icache, tlb, fp,
threadswitch.
Note that, on dual-core Itanium 2 and quad-core processors, specifying
overview
is equivalent to specifying:
--metrics=cpi,stall,dispersal,\
l1dcache,l1icache,l2dcache,l2icache,\
l2dcache,l2icache,tlb,fp,threadswitch
queues Provide BRQ (Bus Request Queue) metrics that may give some insight into possible
system bus related performance problems. Not available on quad-core processors.
snoop Provides data about snoop responses. Only available on quad-core processors.
stall Provides metrics on primary CPU performance limiters by breaking the CPI into
seven components.
sysbus Provides metrics on system bus utilization. If you specify the sysbus event set,
you must use the --bus-speed option to provide bus speed in MHz. For example,
--bus-speed=200. Not available on new quad-core processors.
tlb Provides metrics related to TLB misses.
threadswitch Provides metrics on hyperthreading thread switch behavior. Only available on
dual-core Itanium 2 and quad-core processors.
Limiting PMU Measurement
For measurements that involve the Itanium PMU, you can restrict measurements to specific parts of your
application. The supported measurements are:
alat, branch, cycles, dcache, dtlb, ecount, fprof, icache, itlb, pmu_trace,
scgprof, traps.
HP-UX 11i Version 3: September 2010 − 21 − Hewlett-Packard Company 21