Reference Guide

18 Chapter 1
Introduction to PA-RISC Assembly Language
Summary of Changes for PA-RISC 2.0W (Wide Mode, 64-bit)
You can explicitly use space registers, however, the Assembler issues
a warning if it is other than sr0.
• Some of the completers on ADDB and ADDIB instructions are not valid
for PA2.0W. In addition, new completers are available.
For example: ZNV, SV, and OD are not valid whereas *=, *<, and *<=
are additional completers.
Please refer to the PA-RISC 2.0 Architecture guide for details.
• The displacement on both general load/store and floating load/store
instructions can be up to 16 bits. For example,
ex: FLDD disp(b),tgt ; displacement can be up to 16 bits.
Please refer to PA-RISC 2.0 Architecture for details.
• You must change any .WORD directives that are initialized with a code
symbol or data symbol to .DWORD.
• You can not use space identification operations such as MTSP and
LDSID used for dealing with space registers in user level code.
Currently, the Assembler does not give any warning.
• The procedure calling conventions are different in the HP-UX
PA-RISC 2.0 64-bit architecture. In PA 2.0W, you can pass the first
eight parameters in registers (arg0-arg7). In earlier versions (PA1.0
and PA1.1) and on PA-RISC 2.0, you can only pass the first four
parameters in registers(arg0-arg3). For more information, please
refer to the 64-bit Runtime Architecture for PA-RISC 2.0, at URL:
http://www.software.hp.com/STK/.