HP Caliper User's Guide

NOTE: In --scope system measurements on HP-UX, HP Caliper cannot locate an
executable or a shared library if it is invoked using a relative path. In addition, at certain
times, executables and shared libraries cannot be located even if they are specified with
complete paths. This problem is due to limitations in APIs provided to collect
information about executables and shared libraries associated with a process on HP-UX.
If this problem occurs, the result can be a large number of samples reported as
“unattributed” in --scope system reports. The workaround is to use the
--module-search-path option to specify a list of directories where the executables
and shared libraries for the processes can be located.
--noinlines
See “--inlines ” (p. 83).
--omr
--omr=OPCODE_MATCH_CHANNEL,MIFB,OPCODE_MATCH,OPCODE_MASK[,PROC_FLAGS]
Specifies the bits to program the PMU's opcode matching registers. Forces PMU event
monitoring to be constrained based on Itanium processor encoding (opcode) of an
instruction.
OPCODE_MATCH_CHANNEL
is 0 or 1. 0 corresponds to PMC 8 on Itanium2, and
PMC 32 and 33 on Integrity servers dual-core Itanium
2 and Itanium 9300 quad-core processor. 1 corresponds
to PMC 9 on Itanium2, and PMC 34 and 35 on Integrity
servers dual-core Itanium 2 and Itanium 9300 quad-core
processor.
MFIB
is a combination of characters 'm', 'i', 'f' and 'b'. It is
used to specify whether to match M-slot, I-slot, F- slot
or B-slot instructions.
OPCODE_MATCH
is the opcode bit value against which the instruction
encoding is to be matched. On Integrity servers
dual-core Itanium 2 and Itanium 9300 quad-core
processor, it is an integer of 41-bits or less. On Itanium2,
it is an integer of 27-bits or less.
OPCODE_MASK
is the mask bit value to apply to the instruction
encoding before matching the OPCODE_MATCH bits.
On Integrity servers dual-core Itanium 2 and Itanium
9300 quad-core processors, it is an integer of 41-bits or
less. On Itanium2 processors, it is an integer of 27-bits
or less.
88 HP Caliper Options