HP Caliper User's Guide

performance monitor configuration (PMC)/performance monitor data (PMD)
A set of registers used to configure the performance monitors (PMC) and provide data values
from the performance monitors (PMD). In other words, the PMC register maintains control
information about what to monitor and the PMD register holds the actual data that results from
the monitoring. The Integrity servers processor has four 48–bit performance counters (PMC/PMD
pairs), and the Integrity servers dual-core Itanium 2 and Itanium 9300 quad-core processor have
12 48–bit performance counters (PMC/PMD pairs).
performance
monitoring
unit (PMU)
A unit in the Integrity servers processor family that monitors events on the I/O processor's buses.
The PMU is used to calculate bandwidth, data throughput, and efficiency. HP Caliper uses data
provided by the PMU for its analysis.
PMU
histogram
report
A report that shows results grouped by function. In HP Caliper, these measurements produce
PMU histogram reports: alat, branch, cgprof, cstack, cycles, dcache, dtlb, fprof,
icache, itlb, scgprof, and traps.
pmu_trace
measurement
A measurement, provided by the pmu_trace measurement configuration file, that measures
and reports traces of sampled PMU data associated with the application for each kernel thread.
precise
measurement
An instrumentation-based measurement that gives you exact information about every execution
path in your program. See “Precise Measurements ” (p. 36).
predicated off
instruction
An instruction that entered the instruction pipeline but had its execution aborted before completion.
A predicated off instruction has had its predicate changed to False. A predicated on instruction
has a predicate of True.
predication A technique used in the Integrity servers processor family whereby possible code branches are
executed in parallel before a branch condition is proved. (This is in contrast to the branch prediction
technique, where a branch is predicted and executed before the condition is proved.) Instructions
are associated with a predicate, which determines whether the instruction will be executed fully
or not. With predication, branches and the costs associated with them can be eliminated or lessened.
prefetch A request to the main memory system to preload the cache with needed data.
processor set On HP-UX, a set of processors grouped together for exclusive access to applications assigned to
that processor set. Each application is assigned to a processor set and will run only on processors
in the assigned processor set.
project In the HP Caliper GUI, a set of one or more folders that can contain two types of information:
collection specifications and measurement runs.
register stack
engine (RSE)
The part of the Integrity servers processor that moves registers between the register stack and
the backing store in memory.
retired
instruction
A successfully (though not necessarily fully) executed instruction.
rule file A file used by the HP Caliper Advisor to analyze an application. A rule file contains one or more
independent rule functions and is read, compiled, and executed by the Advisor.
safe
instruction
recognition
(SIR)
A technique used in the Integrity servers processor family to support precise exceptions.
sampled
measurement
A measurement that measures your program's performance at regular intervals, based on CPU
events, recording the current program location and selected performance metrics. See “Sampled
Measurements” (p. 36).
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