HP Caliper User's Guide
• %Useful
This gives an estimate of the percentage of instructions that have an architecturally
visible result. It is only an estimate, because predicated off branches are considered
useful as a result of the semantics that the Itanium 2 ascribes to predicated off
instructions.
• %Nops
This is the percentage of instructions that were observed during the sample period
that were NOPS.
• %Pred
This is an estimate of the percentage of instructions that are predicated off. It is
only an estimate, because Itanium 2 semantics consider predicated off branches
to be useful instructions, (that is, an untaken branch).
• Avg Mhz (present only in Itanium 9300 quad-core processor systems)
This is the average quad-core processor clock frequency observed during the
measurement period.
• CPI
There are two variants of this metric: raw and effective. The raw CPI is computed
using all instructions retired. The effective CPI metric excludes nops and predicated
off instructions, subject to the Itanium 2's predicated off semantics. The effective
metric is primarily useful when attempting to do cross architecture comparisons.
• MIPS
There are two variants of this metric: raw and effective. The raw MIPS is computed
using the raw CPI. The effective MIPS is more useful when attempting to develop
a relationship between throughput and execution rate. However, care must be
taken to ensure that there is not excess idle (or the -I exclude idle flag is used).
Other complications can arise from excessive TLB misses and excessive speculation
control and data speculation fails. An estimate of any bias introduced by these
events can be developed from information available in the tlb, cspec, and dspec
event sets.
308 Event Set Descriptions for CPU Metrics