HP Caliper User's Guide

• Raw CPI (lower is better) — The cycles per instruction, including nop and
predicated off instructions.
• Effective CPI (lower is better) — The cycles per effective instruction, excluding
nop and predicated off instructions.
• Effective CPI during unstalled execution (lower is better) — The cycles per effective
instruction, excluding stall cycles, nop, and predicated off instructions.
• % of thread switches due to L3 misses — The hardware thread switches can happen
due to various reasons including L3 cache misses and timer events. This metric
provides the percentage of thread switches due to L3 cache misses.
• % Core cycles due to this thread — This indicates the percentage of available
processor cycles that the measured process consumed. The other processor cycles
were consumed by other process(es) running in the core's other hyperthread or
were lost to HyperThreading overhead.
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