HP Caliper User's Guide

not include secondary misses and other misses
that were forced to recirculate.
L2D_MISSES Number of L2 data cache misses (in terms of the
number of L2 data cache line requests sent to L3).
It includes all cacheable data requests. This does
not include secondary misses of the L2D.
L2D_REFERENCES.ALL Number of requests made to L2D due to a data
read and/or write accesses. Semaphore operations
are counted as one read and one write.
% of Cycles lost due to GR/load
dependency stalls (lower is better)
Percentage of cycles lost due GR/load
dependency stalls.
% of Cycles lost due to GR/GR
dependency stalls (lower is better)
Percentage of cycles lost due GR/GR dependency
stalls.
% of Cycles lost due to FR/load and
FR/FR dependency stalls (lower is
better)
Percentage of cycles lost due to FR/load and
FR/FR dependency stalls
L1 data cache miss percentage Percentage of L1 data cache reads that are misses.
Percent of data references accessing
L1 data cache
Percentage of data references that access the L1
data cache.
L2 data cache miss percentage Percentage of L2 data cache reads that are misses.
L1 data cache misses per 1000
instructions retired
Number of L1 data cache misses per 1000
instruction retired.
L2 data cache misses per 1000
instructions retired
Number of L2 data cache misses per 1000
instruction retired.
Instructions retired per L1 data
cache access
Number of instructions retired per L1 data cache
access.
Instructions retired per L2 data
cache access
Number of instructions retired per L2 data cache
access.
dcache Measurement Report Metrics
See Table B-13 “Information in dcache Measurement Reports”.
In this table, “program object” refers to any of the following:
Thread
Load module
Function
Source statement
Instruction
252 Descriptions of Measurement Reports