HP StorageWorks Fabric OS 5.X Master Glossary (AA-RW7NA-TE, September 2005)

BER Bit error rate. The rate at which bits are expected to be received in error .
Expressed as the ratio of error bits to total bits transmitted.
See also error.
BISR Built-in self-repair.
BIST Built-in self-test.
bit synchroniza-
tion
The condition in which a receiver is delivering retim e d serial data at the
required bit error rate.
blind-mate con-
nector
A two-way connector used in som e HP StorageWorks switches to provide a
connection between the motherboard and the power supply.
block As it applies to Fibre Channel technology, upper-level application data that
is transferred in a single sequence.
boot cod e Software that initializes the system environment during the early phase of the
boot-up process. For example, boot code might determine the amount of
available memory and how to a ccess it.
boot flash Flash (temporary) memory that stores the boot code.
bport Back-end p
ort of the ASIC.
broadcast The transmission of data from a s ingle sourc e to all devices in the fabric,
regardless of zoning.
See also multicast and unicast.
buffer-to-buffer
flow control
Management of the fram e transmission rate in either a point-to-point topology or
in an arbitrated loop.
See also BB_Credit.
bypass circuitry Circuits that automatically remove a device from the data p ath when valid
signals are dropped.
CA Certificate authority. A trusted organization that issues digital certificates.
See also digital certificate.
CAM Content-addressable memory. A memory chip in which each bit p osition c an be
compared. In regular dynamic RAM (DRAM) and static RAM (SRAM) chips,
the contents are addressed by bit location and then transferred to the CPU for
comparison. In CAM chips, the content is compared in each bit cell, allowing
for very fast table lookups. Since the entire chip is compared, the data content
can often be stored randomly without regard to an addressing scheme, which
would otherwise be required. C AM chips are considerably smaller in storage
capacity than regular memor y chips. Also called associative storage.
CAN Campus area network. A network comprising a limited area but not just one
building.
See also LAN, MAN,andWAN.
cascade Two or more interconnected Fibre Channel switches. HP StorageWorks 1 GB
and greater switches can be cascaded up to 239 switches, with a recommended
maximum of seven interswitch links (no path longer than eight switches).
See also fabric and ISL.
CDR Clock and data recovery circuitry.
CE Conformité Européenne (European Conformity) . A conformity marking for
products that satisfy the essential requirements and safety regulations for the
European Economic Area. It is a mandatory safety marking for the Euro pean
market.
CFG See configuration.
Fabric OS 5.x master glossary
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