Technologies for the ProLiant ML570 G4 and ProLiant DL580 G4 servers

Intel first released the Execute Disable Bit functionality with the Itanium® processor family. The
technology allows the processor to classify areas of memory that cannot execute application code.
When combined with OS support, this helps to prevent certain classes of malicious buffer overflow
attacks. Intel Execute Disable bit is supported by Microsoft Windows Server 2003 SP1, Microsoft
Windows XP SP2, SuSe Linux Enterprise Server 9.2, or Red Hat Enterprise Linux 3 Update 3.
For additional information about these processors, see the
Intel website or the HP technology brief
titled “
The Intel processor roadmap for industry-standard servers.”
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Memory architecture
The ProLiant ML570 G4 and the ProLiant DL580 G4 both use the Intel E8501 chipset architecture;
therefore, they have the same core technologies for the memory subsystem. However, they differ in
their I/O implementation to meet diverse customer requirements.
Background: memory banks and ranks
The term memory bank has been used to refer to more than one concept. For this paper, a memory
bank refers to a pair of DIMMs that are located in the same order in two parallel memory channels
(Figure 1). The DIMMs may be single-rank or dual-rank, which affects memory capacity and how
memory is interleaved for performance. The ProLiant ML570 G4 has three memory banks; the ProLiant
DL580 G4 has two. Either model will accept single-rank or dual-rank DIMMs. For
Figure 1. Memory banks
A single-rank DIMM is a DIMM in which all of the memory chips contribute to a single data set of
64 bits (plus the ECC bits) and are activated by the same chip-select signals.
To increase memory density, memory suppliers are producing dual-rank DIMMs. Typically, a dual-
rank DIMM is made by stacking a second set of memory chips directly on top of the first set of
memory chips. A dual-rank DIMM produces a second data set of 64 bits (plus ECC bits) and requires
two chip-selects with different signals to differentiate between the two sets of memory chips. Although
physically taking up the space of a single DIMM, a dual-rank DIMM acts as if it were two separate
DIMMs and is considered two electrical loads by the chipset.
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Available at http://h20000.www2.hp.com/bc/docs/support/SupportManual/c00164255/c00164255.pdf
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