Technologies for the ProLiant ML570 G4 and ProLiant DL580 G4 servers

Dual-core architecture

Dual-core processors are two separate microprocessors on the same physical die. When combined

with Intel Hyper-Threading technology, each dual-core processor has the ability to execute four

simultaneous threads. By increasing the number of processors available to the operating system,

multiple threads can be executed more efficiently. In addition, a dual-core processor uses less power

than two equivalent single-core processors and therefore produces less heat.

Xeon dual-core processors

The ProLiant ML570 G4 and DL580 G4 platforms support the following processors:

• Xeon 7140M 3.4 GHz/16MB L3 cache

• Xeon 7130M 3.2 GHz/8MB L3 cache

• Xeon 7120M 3.0 GHz/4MB L3 cache

• Xeon 7110M 2.6 GHz/4MB L3 cache

• Xeon 7030 2.8 GHz/2 x 1MB L2 cache

• Xeon 7041 3 GHz/2 x 2MB L2 cache

The 7100 sequence processors are built using 65-nanometer (nm) process technology and use a

200-MHz front side bus which is quad-pumped to 800 MHz, providing up to 6.4 GB/s data transfer

rates. The 65-nm technology uses 65-nm-wide circuits on the chip, allowing for high processor speeds

and more circuits per chip than earlier 90-nm technology. A quad-pumped bus performs four data

transfers per clock cycle, effectively quadrupling the data throughput for the bus. The processors

feature an L3 cache that is shared between cores and supports IA-32 and the EMT64 instruction set

for running 64-bit applications and operating systems.

The 7000 sequence processors are built on 90-nanometer technology.

The 64-bit Xeon processor uses the NetBurst architecture with Hyper-Threading technology and Hyper-

Pipelined technology. It includes support for Enhanced Intel Speed-Step® Technology and Intel

Execute Disable Bit technology.

As server and rack densities have increased, power and heat management have become increasingly

important. In response, Intel developed Enhanced Intel Speed-Step technology, which exposes power

state registers in the processor. With the appropriate ROM or OS interface, these registers can be

used to switch the processor between different power states, changing the operating frequency and

voltage of the processor. This, in turn, lowers the power usage and heat production of the processor.

Demand-based switching is the OS implementation of power management using the Enhanced Speed-

Step technology. It is supported by some new operating systems including Microsoft Windows Server

2003 SP1, Red Hat Enterprise Linux 4 Update 1, and SUSE Linux Enterprise Server 9 SP1.

HP Power Regulator

for ProLiant is an OS-independent power management feature of HP ProLiant

servers that uses Enhanced Intel Speed-Step technology. HP Power Regulator supports both dynamic

and static modes. With HP Static Low Power Mode, the processors are configured to run continuously

in a lower power state. This is useful for customers with power-constrained data centers who require a

guaranteed maximum power usage for each server. For servers that operate in moderately or

minimally loaded environments, there will be little, if any, performance degradation. HP Dynamic

Power Savings Mode lowers overall power usage of the server without affecting system performance.

When this mode is enabled, the System ROM will dynamically modify the frequency and voltage of

each processor, based on the processor workload. The processor operates in a high power state only

when needed, thus reducing the overall system power usage.

For information about these Intel technologies, visit the Intel website at www.intel.com.

Available online at http://h18013.www1.hp.com/products/servers/management/ilo/power-regulator.html