HP ProLiant DL585 G5 server technology, 1st edition

Quad-core AMD Opteron processors
The AMD 8300-series quad-core processor includes four separate microprocessor cores on one
physical die (Figure 2). AMD quad-core technology delivers high performance and reduced latency
for multi-threaded and multi-tasking environments. Quad-core processors provide two primary
benefits:
• Enhanced performance per watt—significant performance increase while operating within the same
power and thermal envelopes as dual-core processors
• Increased virtualization—on-die memory controller providing optimum performance in virtual
machine (VM) environments
Increasing the number of processors
available to the operating system enables
more efficient execution of multiple
threads. In addition, a quad-core
processor uses less power than two
(equivalent) dual-core processors and
therefore reduces power usage and heat
production.
Figure 2. AMD Opteron 8300 series quad-core architecture
CPU0
512 KB
L2 Cache
2 MB L3 Cache
System Request I/F
Crossbar Switch
DDR2 Memor
y
Cntlr
Hypertransport I/F
72-bit
72-bit
Link 1
Link 2
Link 3
CPU1
512 KB
L2 Cache
CPU2
512 KB
L2 Cache
CPU3
512 KB
L2 Cache
The DL585 G5 server supports the Dual
Dynamic Power Management (DDPM)
capabilities of the AMD Opteron 8300
processor. DDPM architecture separates
the core and memory controller voltage
planes. The HP ProLiant DL585 G5
features a split-plane motherboard that
separates the voltage feeds to the CPU
core and the DDR2 memory controller.
This split-plane design allows granular
power management of the Opteron
processor for peak operating efficiency
and increased performance.
As an alternative to traditional front-side bus technology, AMD Opteron processors make use of Direct
Connect Architecture and HyperTransport® technology. Direct Connect architecture is AMD’s
designation for the coherent HyperTransport connection between processors. It eliminates the
bottlenecks inherent in front-side bus technology by integrating the memory controller into the
processor and directly connecting CPUs to the I/O subsystem and other processors. HyperTransport is
a parallel, point-to-point interconnect that replaces parallel front-side bus technology.
A 64-bit architecture has a much larger amount of directly addressable (flat) memory space than a
32-bit processor. The AMD64 instruction set allows the OS to access a flat memory address space
greater than 4 GB without incurring the overhead of Physical Address Extensions (PAE). This can result
in performance advantages, particularly the ability to use large amounts of memory such as with
intensive floating-point calculations used in scientific and engineering modeling programs.
nVidia NForce Professional 2200 and 2050 chipsets
The DL585 G5 makes use of both the nVidia nForce Professional 2200 and 2050 chipsets to offer a
large number of expansion slots for enhanced flexibility. The 2050 chipset connects to the AMD-8132
HyperTransport tunnel with a 16-bit, 1-GHz HyperTransport interface and offers 20 lanes of PCIe
support divided into three x4 slots and one x8 slot. The 2200 chipset connects directly to the
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