HP ProLiant 300-series AMD-based G6 server technology

Abstract
This technology brief describes the key technologies implemented in HP ProLiant 300-series G6
servers based on AMD™ processors. As of this writing, the AMD-based 300--series G6 server
platforms are limited to the ProLiant DL385. A link to the QuickSpecs for this server is listed in the “For
more information” section at the end of this technology brief.
Introduction
HP ProLiant 300-series G6 servers include these new technologies:
AMD Opteron™ six-core 2400 Series processors
The ProLiant Onboard Administrator powered by Integrated Lights-Out 2 (iLO 2) that delivers power
and temperature management through multiple sensors and fan control
Input/output (I/O) technologies such as PCI Express (PCIe) and faster Smart Array controllers that
incorporate common form factor components
”Right Size” common-slot power supplies in multiple sizes to improve power efficiency
The technologies discussed in this paper are implemented in all AMD-based ProLiant 300-series G6
servers. Exceptions are noted where different levels of technology implementation or service exist in
individual ProLiant 300-series G6 platforms.
For complete specifications of all ProLiant 300-series servers, see the HP website at
www.hp.com/products/servers/platforms
.
Processor technology
The HP G6 AMD-based 300-series servers use the AMD Opteron™ 2400 series Six-Core processor.
These processors are based on AMD's 45 nanometer (nm) quad-core architecture. In addition these
processors use Direct Connect Architecture 2.0, HyperTransport 3.0, HT Assist, Advanced Platform
Management Link (APML) Remote Power Management Interface, and 8x ECC error correction. The
Six-Core processors fit into socket 1207 architecture just as previous four-core AMD Opteron
processors do. Each processor operates at speeds of up to 2.9 GHz, has 512 KB of L2 cache
memory, and shares a total of 6 MB of L3 cache.
Direct Connect architecture 2.0
Instead of a front-side bus architecture, Direct Connect integrates the memory controller into the
processor and directly connects CPUs to the I/O subsystem and other processors (Figure 1). Direct
Connect Architecture uses direct communication links (HyperTransport links) between each CPU,
between CPU and I/O, and between CPU and memory. Direct Connect Architecture currently scales
up to 12 cores, provides superior memory and I/O capability, near native virtualization performance,
and a range of power bands
1
that place a priority on low power consumption.
1
Power bands refer to a new metric developed by AMD to reflect power consumed by the processor and its integrated memory
controller during peak workloads. This metric is based on AMD’s measurement of Average CPU Power (ACP). For more
information on ACP, see the whitepaper at www.amd.com/us-
en/assets/content_type/white_papers_and_tech_docs/43761C_ACP_WP.pdf
3