HP ProLiant AMD-based 100-series G7 servers

7
 Two quad-rank DIMMs per channel results in eight way bank interleaving
 Two dual-rank DIMMs and one quad-rank DIMM results in eight way bank interleaving (in servers
using three DIMMs per channel)
Memory channel interleaving
With memory c
hannel interleaving, data is transferred by means of alternate routing through the two
available memory channels. The result is that when the memory controller needs to access a block of
logically contiguous memory, the requests are distributed more evenly across the two channels rather
than potentially stacking up in the request queue of a single channel. This alternate routing decreases
memory access latency and increases performance. As with memory bank interleaving, memory
channel interleaving increases the probability that more DIMMs need to be kept in an active state.
Memory channel interleaving is always active on the AMD 6100-series processor.
Memory node interleaving
With node interleaving, memory c
an be interleaved across any subset of nodes in the multiprocessor
system. Node interleaving breaks memory into 4 KB addressable entities. Addressing starts with
address 0 on node 0 and assigns sequential addresses through address 4095 to node 0, addresses
4096 through 8191 to node 1, addresses 8192 through 12287 to node 2, and addresses 12888
through 16383 to node 3. Address 16384 is assigned to node 0, and the process continues until all
memory has been assigned in this fashion. An application that uses a common allocation thread will
benefit from node interleaving.
Memory node interleaving is disabled by default. Administrators can activate node interleaving using
the BSU. Node interleaving can only be configured if the memory footprint for both processors is
identical.
8X error correction
In AMD Opteron 6100-series processors, the memory controller supports error correction circuitry
(ECC) for both x4 and x8 DIMMs.
I/O technologies
ProLiant 100-series G7 servers incorporate PCI Express, Serial-Attached SCSI (SAS), and SATA I/O
technologies. This server architecture lets administrators add PCI Express-compliant expansion cards
to the system. SAS is a serial communication protocol for direct-attached storage devices such as SAS
and SATA hard drives.
PCI Express technology
All ProLiant G7 servers support the PCIe 2.0 specification. PCIe 2.0 has a per-lane signaling rate of
5 Gb/s―double the per-lane signaling rate of PCIe 1.0. PCIe 2.0 is completely backward compatible
with PCIe 1.0. A PCIe 2.0 device can be used in a PCIe 1.0 slot and a PCIe 1.0 device can be used
in a PCIe 2.0 slot. Table 1 shows the level of interoperability between PCIe cards and PCIe slots.
Table 1. PCIe device interoperability
PCIe
device type
x4 Connector
x4 Link
x8 Connector
x4 Link
x8 Connector
x8 Link
x16 Connector
x8 Link
x16 Connector
x16 Link
x4 card x4 operation x4 operation x4 operation x4 operation x4 operation
x8 card Not allowed x4 operation x8 operation x8 operation x8 operation
x16 card Not allowed Not allowed Not allowed x8 operation x16 operation