Operating instructions

2.2.3 SRM Console Power-Up Display
At the completion of SROM power-up, the primary CPU transfers con-
trol to the SRM console program, described in Section 2.3. The console
program continues the system initialization. Failures are reported to
the console terminal through the power-up screen and a console event
log.
Example 2–3 SRM Power-Up Display
OpenVMS PALcode V1.96-40, Tru64 UNIX PALcode V1.90-31
starting console on CPU 0
initialized idle PCB
initializing semaphores
initializing heap
initial heap 240c0
memory low limit = 218000 heap = 240c0, 17fc0
initializing driver structures
initializing idle process PID
initializing file system
initializing timer data structures
lowering IPL
CPU 0 speed is 1000 MHz
create dead_eater
create poll
create timer
create powerup
access NVRAM
1536 MB of System Memory
Testing Memory
...
probe I/O subsystem
Hose 0 - PCI bus running at 33Mhz
entering idle loop
probing hose 0, PCI
probing PCI-to-ISA bridge, bus 1
bus 0, slot 8 -- eia -- Intel 82559ER Ethernet
bus 0, slot 16 -- dqa -- Acer Labs M1543C IDE
bus 0, slot 16 -- dqb -- Acer Labs M1543C IDE
Hose 1 - PCI bus running at 66Mhz
probing hose 1, PCI
Hose 2 - PCI bus running at 66Mhz
probing hose 2, PCI
bus 0, slot 1, function 0 -- pka -- Adaptec AIC-7899
bus 0, slot 1, function 1 -- pkb -- Adaptec AIC-7899
bus 0, slot 5 -- ega -- BCOM Gigabit 5703c
2-6 DS25 Owner’s Guide