Service manual

System Overview 1-27
The system bus motherboard consists of a 40-bit command/address bus, a 128-bit
plus ECC data bus, and several control signals, clocks, and a bus arbiter. The bus
requires that all CPUs have the same high-speed oscillator providing the clock to the
Alpha chip.
The AlphaServer 4100 system bus connects up to four CPUs, four pairs of memory
modules, and a single I/O bus bridge module. Note that the I/O bus bridges may be
desinated as IODn where n is the number of the PCI bus. The first bridge is
designated IOD0 and IOD1.
The AlphaServer 4000 system bus connects up to two CPUs, two pairs of memory
modules, and two I/O bus bridge modules. The second bridge on the 4000 system
bus is designated IOD2 and IOD3.
The system bus clock is provided by an oscillator on the CPU in slot CPU0. This
oscillator has a 1:5 ratio to the Alpha chip. With 300 MHz CPUs, for example, the
system bus operates at 60 MHz.
The system bus motherboard initiates memory refresh transactions. The
motherboard sits at the bottom of the system drawer, and in addition to CPUs,
memory, and I/O bridges, holds a power control module.
5 volt and 3.43 volt power is provided directly to the motherboard from the power
supplies.