Service manual

1-26 AlphaServer 4000/4100 Service Manual
1.13 System Bus
The system bus consists of a 40-bit command/address bus, a 128-bit plus ECC
data bus, and several control signals and clocks.
Figure 1-17 System Bus Block Diagram
MEM3 (4100 only)
MEM2 (4100 only)
MEM1
MEM0
SYNC
DRAMS
ADR
ADR
DATA
CTRL
MEM CTRL&
CNTRL ARB
SIM_ADR
CPU0
CPU1
CPU2 (4100) or IOD2 (4000)
CPU3 (4100) or IOD3 (4000)
A
L
P
H
A
CTRL
PCI/EISA
System to PCI Bus
Bridge
EV_ADR
EV_DATA
ROW
COL
IOD0
IOD1
PCI/EISA0
PCI1
System Bus
Control
MC ADR
<39:4>
MC DATA
<127:0>
PKW0425-96