Service manual

Error Registers 6-3
Fill data from B-cache or main memory could have correctable or uncorrectable
errors in ECC mode. In parity mode, fill data parity errors are treated as
uncorrectable hard errors. System address/command parity errors are always treated
as uncorrectable hard errors, irrespective of the mode. The sequence for reading,
unlocking, and clearing EI_STAT, EI_ADDR, BC_TAG_ADDR, and FILL_SYN is
as follows:
1. Read the EI_ADDR, BC_TAG_ADDR, and FIL_SYN registers in any order.
Does not unlock or clear any register.
2. Read the EI_STAT register. This operation unlocks the EI_ADDR,
BC_TAG_ADDR, and FILL_SYN registers. It also unlocks the EI_STAT
register subject to conditions given in Table 6-2, which defines the loading and
locking rules for external interface registers.
NOTE: If the first error is correctable, the registers are loaded but not locked. On
the second correctable error, the registers are neither loaded nor locked.
Registers are locked on the first uncorrectable error except the second hard error
bit. This bit is set only for an uncorrectable error that follows an uncorrectable
error. A correctable error that follows an uncorrectable error is not logged as a
second error. B-cache tag parity errors are uncorrectable in this context.