Service manual

5-42 AlphaServer 4000/4100 Service Manual
5.3.7 MCHK 620 Correctable Error
The MCHK 620 error is a correctable error detected by the IOD.
The error log in Example 5-7 shows the following:
➊ CPU0 logged the error in a system with two CPUs.
➋ The External Interface Status Register is not valid.
➌ The MC Error Info Registers 0 and 1 captured the error information.
➍ The commander at the time of the error was CPU0.
➎ The command at the time of the error was a write-back memory command.
The IOD detected a recoverable error on the system bus. The MC command at the
time of the error is a WriteThru-Mem Command (x00000006). The system bus
commander at the time of the error is CPU0. Since this is a write, the defective FRU
is CPU0.
NOTE: The error log example has been edited to decrease its size; registers of
interest are in bold type. The “Horse” module referred to in the error log is the
system bus to PCI bus bridge module, the B3040 module. The “Saddle” module is
the PCI motherboard, the B3050 module. The “MC” bus is the system bus.
Refer to Table 5-9 for information on decoding commands, and refer to Table 5-10
for information on node IDs.
Example 5-7 MCHK 620 Correctable Error
Logging OS 2. DIGITAL UNIX
System Architecture 2. Alpha
Event sequence number 32.
Timestamp of occurrence 28-JUN-1996 19:45:42
Host name sect06
System type register x00000016 AlphaStation 4x00
Number of CPUs (mpnum) x00000002
CPU logging event (mperr) x00000000
➊
Event validity 1. O/S claims event is valid
Event severity 5. Low Priority
Entry type 100. CPU Machine Check Errors
CPU Minor class 4. 620 System Correctable Error
Software Flags x0000000000000000
Active CPUs x00000003
Hardware Rev x00000000
System Serial Number C1563
Module Serial Number
Module Type x0000