Service manual

Error Logs 5-33
PALTEMP21 xFFFFFC000043CD40
PALTEMP22 xFFFFFC000058D540
PALTEMP23 x000000007FC67A58
Exception Address Reg xFFFFFC0000433E0C
Native-mode Instruction
Exception PC x3FFFFF000010CF83
Exception Summary Reg x0000000000000000
Exception Mask Reg x0000000000000000
PAL Base Address Reg x0000000000020000
Base Addr for PALcode:
x0000000000000008
Interrupt Summary Reg x0000000000200000
External HW Interrupt at IPL21
AST Requests 3-0:
x0000000000000000
IBOX Ctrl and Status Reg x000000C160000000
Timeout Counter Bit Clear.
IBOX Timeout Counter Enabled.
Floating Point Instructions will Cause
FEN Exceptions.
PAL Shadow Registers Enabled.
Correctable Error Interrupts Enabled.
ICACHE BIST (Self Test) Was Successful.
TEST_STATUS_H Pin Asserted
Icache Par Err Stat Reg x0000000000000000
Dcache Par Err Stat Reg x0000000000000000
Virtual Address Reg xFFFFFFFFB6ED3D38
Memory Mgmt Flt Sts Reg x0000000000016211
If Error, Reference Which Caused Was Write
If Err, Reference Resulted in DTB Miss
Fault Inst RA Field: x0000000000000008
Fault Inst Opcode: x000000000000002C
Scache Address Reg xFFFFFF000002502F
Scache Status Reg x0000000000000000
Bcache Tag Address Reg xFFFFFF8077AFAFFF
Last Bcache Access Resulted in a Miss.
Value of Parity Bit for Tag Control Status
Bits Dirty, Shared & Valid is Set.
Value of Tag Control Dirty Bit is Clear.
Value of Tag Control Shared Bit is Set.
Value of Tag Control Valid Bit is Set.
Value of Parity Bit Covering Tag Store
Address Bits is Set.
Tag Address<38:20> Is: x000000000000077A
Ext Interface Address Reg xFFFFFF007E00000F
Fill Syndrome Reg x000000000000DE08
Ext Interface Status Reg xFFFFFFF004FFFFFF
➋
Error Occurred During D-ref Fill
LD LOCK xFFFFFF0076750B8F
** IOD SUBPACKET -> ** IOD 0 Register Subpacket
WHOAMI x000008BA Module Revision 2.
VCTY ASIC Rev = 0
Bcache Size = 2MB
MID 2.
GID 7.
Base Address of Bridge x000000F9E0000000
Dev Type & Rev Register x06008231 CAP Chip Revision: x00000001
HORSE Module Revision: x00000003
SADDLE Module Revision: x00000002
SADDLE Module Type: Left Hand
PCI-EISA Bus Bridge Present on PCI Segment