Technical data

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1-1
Chapter 1
9030/40 Product Information
Features
32-bit CPU and
full
32-bit internal
and
external data paths.
Add-on performance with multiple CPUs.
Up
to 10M bytes
RAM.
36M byte/second memory processor bus.
Seven internal HP-CIO slots expandable to 23.
Virtual memory with 500M byte address space.
Single-user or multi-user system.
HP-UX Operating System with C language, supports FORTRAN 77 and Pascal languages.
Error correcting
and
self-healing memory.
Diagnostic service panel with switches and
LEOs.
Broad range of peripherals.
Central Processor Unit (CPU)
2 Types CPU board-Aoating Point CPU has math chips.
32-bit single chip containing 450,000 transistors.
Direct address range of 500M bytes.
Supports
IEEE
Aoating-point Format.
Instruction set of
230
operation codes.
IBM
Hz
clock rate with micro-instruction cycle time of
55
ns and memory cycle time of
110
ns.
Typical execution times:
(CPU without math chips)
Load register from memory
........................................
550
nanoseconds
64-bit floating-point multiply
......................................
10.34
microseconds
32-bit integer multiply
............................................
2.92 microseconds
64-bit floating-point add
..........................................
5.94
microseconds
(CPU with math chips)
1.4 times faster (overall)
2 times faster
on
BID
Program