Installation guide

Chapter 1

HP Integrity rx7640 Server and HP 9000 rp7440 Server Overview

Detailed Server Description

Figure 1-8 CPU Locations on Cell Board

Memory Subsystem

Figure 1-9 shows a simplified view of the memory subsystem. It consists of two independent access paths,

each path having its own address bus, control bus, data bus, and DIMMs. Address and control signals are

fanned out through register ports to the synchronous dynamic random access memory (SDRAM) on the

DIMMs.

Table 1-1 Cell Board CPU Module Load Order

Number

of CPU

Modules

Installed

Socket 2 Socket 3 Socket 1 Socket 0

1 Empty slot Empty slot Empty slot CPU installed

2 CPU installed Empty slot Empty slot CPU installed

3 CPU installed Empty slot CPU installed CPU installed

4 CPU installed CPU installed CPU installed CPU installed

Controller

Cell

Socket 2

Socket 3

Socket 1

Socket 0