Specifications

Number of processors per partition Average memory latency
4 processors (one cell) ~185 ns
8 processors (two cells) ~249 ns
There are two types of memory latency within the HP 9000 rp8440 Server:
• Memory latency within the cell refers to the case in which an application runs on a partition that
consists of a single cell or uses cell local memory.
• Memory latency between cells refers to the case in which the partition consists of two or more cells
and cell interleaved memory is used. For example, for an HP 9000 rp8440 Server with four cells in
the partition, 25% of the addresses are to memory on the same cell as the requesting processor,
and the other 75% of the addresses are to memory on the other three cells.
The HP 9000 rp8440 Server average memory latency depends on the number of processors in the
partition. Assuming that memory accesses are equally distributed across all cell boards and memory
controllers within the partition, the average idle memory latency (load-to-use) is shown in the following
table.
Number of processors per partition Average memory latency
4 processors (one cell) ~185 ns
8 processors (two cells) ~249 ns
16 processors (four cells) ~334 ns
Cell hot-plug
The HP 9000 rp7440 and rp8440 Servers support cell hot-plug. Coupled with the partitioning
capability
1
of the servers and appropriate support from the operating system, cell hot-plug allows for
the servicing of cell boards within a single partition while the other partition continues normal
operation. Any number of configuration changes can be made to the partition being serviced,
including replacing the complete cell board, adding or deleting processors and memory, or even
increasing or decreasing the number of cells in that partition. (Cell hot-plug is supported only in
systems with two or more partitions.)
Crossbar backplane
The next basic building block of the HP 9000 rp8440 Server is the crossbar backplane. The crossbar
backplane contains two crossbar chips that provide non-blocking connections between four cells and
their associated memory and I/O. Each cell has three connections to the crossbar fabric. The HP
9000 rp7440 Server does not have a crossbar backplane, so communication between its cells is over
three direct-connect links.
Crossbar chips and links
The Crossbar ASIC is yet another part of the HP sx2000 chipset. The Crossbar ASIC and CC
communicate over a high-speed SERDES-based link using 8 bit/10 bit encoding with clock/data
recovery. As a result, there is no critical clock signal in any link that could be a single point of failure
for that link.
The peak bandwidth for each port has been increased as well to 11.5 GB/s (9.2 GB/s typical),
giving aggregate peak bandwidth of 34.5 GB/s (27.6 GB/s typical) per cell. In addition to
1
The HP 9000 rp8440 Server can be configured as a single large SMP server or hardware-partitioned into up to four smaller logical servers. See
“nPartitions” for more details about partitioning.
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