Service manual

CPU Assembly Connectors
A-12
Table A-11 System Expansion Connector J12
Pin Row A Row B Row C Pin Row A Row B Row C
1 GROUND GROUND GROUND 17 A25 A27 GROUND
2 V_PRINT VBAT VBAT 18 A22 A24 A23
3 HLDA Reserved PPWRON 19 A19 A21 A20
4 PLOADON ACON Reserved 20 A16 A18 A17
5 ENBL5V nNEW5V AD8 21 A1 A3 A2
6 AD7 AD6 AD5 22 FSW_+5V FSW_+5V FSW_+5V
7 AD9 AD10 AD11 23 LAD13 LAD15 LAD14
8 AD4 AD3 AD2 24 LAD10 LAD12 LAD11
9 AD12 AD13 AD14 25 LAD7 LAD9 LAD8
10 AD1 AD15 D0 26 LAD7 LAD6 LAD5
11 F_+5V F_+5V F_+5V 27 ALE infecting FEDATA
12 GPIO0 GPIO1 XWAIT 28 nDEN FEPWR nFECLK
13 A31 GPIO2 GPIO3 29 nRESET nAS nREADY
14 A28 A30 A29 30 nBE0 DTnR nBLAST
15 nXROMCS nROMOE ONSTBY 31 nBE1 INT1 WnR
16 GROUND GROUND GROUND 32 GROUND CLK2A GROUND
Signal Definition
A1-A3 CPU address bus.
A16-A31 CPU address bus.
ACON Goes high when unit is attached to AC power source.
AD1-AD15 Multiplexed address/data bus.
ALE Address latch enable.
CLK2A 32 MHz clock.
D0 Data bit 0
DTnR Data transmit/receive.
ENBL5V System Gate Array output to turn on SW_+5V/F_+5V.
F_+5V Unswitched 5 V.