Product Specs

M.2-B048-101
Confidential Page 7
2.3 Pin definition
The pin definition of the module interface is shown in Table 2-1.
Table 2-1 PCIE M.2 interface pin definition
Pin
Defination
Function
Pin
Defination
Function
75
CONFIG_2 (GND)
74
3.3V
73
GND
72
3.3V
71
GND
70
3.3V
69
CONFIG_1 (GND)
68
32.768KHz
32.768KHz
67
RESET# (I)(0/1.8V)
66
SIM DETECT
65
SDH0_CMD
SDIO CMD
64
UART0_TX
UART0
63
GPIO (I/0)(0/1.8V)
62
UART0_RX
61
GPIO (I/0)(0/1.8V)
60
GPIO (I/0)(0/1.8V)
PCIE ENABLE
59
GPIO (I/0)(0/1.8V)
58
NC/UART1_TX
Option UART1
57
GND
56
NC/UART1_RX
55
REFCLKP
PCIE REFCLK
54
PEWAKE# (IO)(0/3.3V)
53
REFCLKN
52
CLKREQ# (IO)(0/3.3V)
51
GND
50
PERST# (I)(0/3.3V)
49
PERp0
PCIE RX0
48
SDH0_D0
SDIO Data and
Clk
47
PERn0
46
SDH0_D1
45
GND
44
SDH0_D2
43
PETp0
PCIE TX0
42
SDH0_D3
41
PETn0
40
SDH0_CLK
39
GND
38
NC/GPIO (I/0)(0/1.8V)
Option GPIO
37
USB3.0‐Rx+
USB3.0-RX
36
UIM_1‐PWR (O)
USIM_1
35
USB3.0‐Rx‐
34
UIM_1‐DATA (IO)
33
GND
32
UIM_1‐CLK (O)
31
USB3.0‐Tx+
USB3.0-TX
30
UIM_1‐RESET (O)
29
USB3.0‐Tx‐
28
UART2_CTS(0/1.8V)
UART2
27
GND
26
UART2_RTS(0/1.8V)
25
GPIO (I/0)(0/1.8V)
24
UART2_RXD(0/1.8V)
23
GPIO‐ WoWWAN# (O)(0/1.8V)
22
UART2_TXD (O)(0/1.8V)
21
CONFIG_0 (NC)
20
GPIO (I/0)(0/1.8V)
19
/
18
/
17
/
16
/
15
/
14
/
13
/
12
/
11
GND
10
GPIO‐LED#1 (O)
9
USB_D‐
USB2.0
8
W_DISABLE1# (I)(0/3.3V)
7
USB_D+
6
FULL_CARD_POWER_OFF#
(I)(0/3.3V
5
GND
4
3.3V
3
GND
2
3.3V
1
CONFIG_3 (NC)