Datasheet

8.7 Common Memory Read timing
Detailed timing specifications are shown in the following figure.
0
Data Valid from Address
Change
tvA
5Output Enable Time from OEtenOE
5Output Enable Time from CEtenCE
100Output Disable time from OEtdisOE
100Output Disable Time from CEtdisCE
125Output Enable Access TimetaOE
250Card Enable Access TimetaCE
250Address Access TimetaA
250Read Cycle TimetcR
Maximum
(ns)
Typical
(ns)
Minimum
(ns)
ItemSymbol
Figure 24. Common Memory Read timing
Hard disk drive specification for DSCM-11000/-10512/-10340
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