Datasheet

8.6 Attribute Memory Read timing
The Attribute Memory access time is defined as 300 ns. Detailed timing specifications are shown in the
following two figures.
0Data Setup for WAIT# Released
2
tvWT
700WAIT# Pulse Width
2
twWT
35WAIT# Valid from OE
1
tvWT-OE
20Card Enable Hold Time
1
thCE
0Card Enable Setup Time
1
tsuCE
20Address Hold Time
1
thA
30Address Setup Time
1
tsuA
0Data Valid from Address ChangetvA
5Output Enable Time from OEtenOE
100Output Disable Time from CEtdisCE
150Output Enable Access TimetaOE
300Card Enable Access TimetaCE
300Address Access TimetaA
300Read Cycle TimetcR
Maximum
(ns)
Typical
(ns)
Minimum
(ns)
ItemSymbol
1. These timing are specified for hosts and CF Cards which support the WAIT# signal.
2. These timings specified only when WAIT# is asserted within the cycle.
Figure 22. Attribute Memory Read timing data
Data Valid
An,REG#
CE#
OE#
WAIT#
tcR
taCE
tsuA
taOE
twWT
tdisCE
tsA
tsuCE
tvWT-OE
thA
tvA
tdisOE
tvWT
tenOE
thCE
D[15::0]
Figure 23. Attribute Memory Read timing diagram
Hard disk drive specification for DSCM-11000/-10512/-10340
35