User Manual

 64K L2 Cache
 5-8 Stage Variable Pipeline
 Retire up to 2 Instructions per Cycle
 Out-of-Order Execution
 Three-level Branch Prediction
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3.2 wMMX2 DSP Support
Up to 1600 MMACS per second. Supports complex Digital Signal Processing with
little CPU overhead. Audio CODECs including MP3, WMA and AAC utilize the
wMMX2 engine.
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3.3 802.11a/b/g/n 1x1 Wi-Fi
Dual-band design with 2.4GHz and 5GHz support. Supports transmit modes up to 150mbps.
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3.3.1 20MHz and 40MHz Channels
Supported in both 2.4 and 5 GHz bands
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3.3.2 Diversity Antenna Support
Caprica2L supports two antenna connections in a diversity antenna
configuration (using orthogonal mounting).
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3.4 128MB DDR3 Memory
High-performance memory for maximum processor and network performance.
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3.5 128MB SLC Flash Memory
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3.6 I2C
The I2C Interface is the port which Caprica2L communicates with the external system.
The communication protocol "Play-Fi Host Communication Protocol" is described in a
separate document (PHORUS-CAP-
TSD-0004-Caprica-Host-Communication-Protocol). The Caprica2L Module is
configured as a I2C slave with address 0x52.