User Manual

Bluetooth 4.0 BLE Module
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SPI T iming
The SPI interface supports clock speeds up to 12 MHz with VDDIO ≥ 2.5V. The supported clock speed is 6 MHz
when 2.5V > VDDIO ≥ 2.35V.
Figure 7 and Figure 8 show the timing requirements when operating in SPI Mode 0 and 2, and SPI Mode 1
and 3, respectively.
Table 8: SPI Interface Timing Specifications
Reference
Characteristics
Min
Typ
Max
1
T ime from CSN asserted to first clock edge
1 SCK
100
∞
2
Master setup time
–
½ SCK
–
3
Master hold time
½ SCK
–
–
4
Slave setup time
–
½ SCK
–
5
Slave hold time
½ SCK
–
–
6
T ime from last clock edge to CSN deasserted
1 SCK
10 SCK
100
6
SPI_CSN
SPI_CLK
1
(Mode 0)
SPI_CLK
(Mode 2)
2 3
SPI_MOSI
- First Bit
Second Bit
Last bit -
4 5
SPI_MISO
Not Driven
First Bit
Second Bit
Last bit
Not Driven
Figure 7: SPI T iming – Mode 0 and 2
Figure 8: SPI T iming – Mode 1 and 3