System User Guide / Owners Manual
22
tolockandhasa0.1Hzbandwidth.TypicalAES/EBUreceiverchipslockwithinafew
samplesandhaveabandwidthofaround10kHz.
Ifthelocalclockisveryclean,anarrowbandPLListhebestchoicebecauseallbut
thelowest-frequencyjitterintheexternalsyncisrejected.Aconverterdesigned
alongthoselineswillsoundstellarunderallconditions.Iftheexternalsyncisvery
clean,awidebandPLListhebestchoicebecausethelocaloscillator’sownerrors
willbecorrected.ThisisthecasewhereagoodexternalsyncliketheCC1improves
abudgetconverter,orevenapriceyone,beyondexpectations.
Ifthedesignerguesseswronghowever,atoo-fastPLLmightendupforcingan
otherwisefinelocaloscillatortoreproducefaithfullyeverybumpandhiccupinthe
externalsyncsignal.Equipmentconstructedalongtheselinessoundgoodinmas-
termodebutwillonlyimproveinslavemodeiftheexternalsyncisstablerthanthe
internaloscillator.Anunstableexternalsyncactuallymakesitsoundworse.
Alternativelyatoo-slowPLLmightnotcorrectalocaloscillatorofsuboptimalqual-
ity.Inthatcase,jitterperformanceisbadregardlessofthequalityoftheexternal
clock.Andhereliestherub:aslowPLLwillalwaysmakeaconvertersoundthe
same,butnotnecessarilygood.Ifaconverterisinsensitivetoexternaljitter,that
aloneisnoindicationthatitsinternaljitterislow.AslowPLLshutsthedoorto
externaljitter,butalsotoanyimprovementtobehadfromexternalclockingwitha
verystablesource.
Inshort,onecannotexpectanexternalclocktoworkmiracleseverytime.IfthePLL
ofthereceivingdeviceisslow,thesoundqualitywillbeindependentofthequality
oftheexternalclock,forbetterorforworse.IfthePLLisfast,realimprovements
canbehad.
Byexample,thegraphbelowshowstheresultofmeasurementsonawellknown
DAWconverter.Thejitterperformance,measuredattheconverterchips’clockpin,
improvessubstantiallyatjitterfrequenciesbelow200HzwhenslavedtoaCC1.
4f
1f
100p
30p
10f
10f
100f
100f
1p
1p
10p
10p
Jitte
r
(s)
Jitter density (s/sqrtHz)
20 20k50 100 200 500 1k 2k 5k 10k
Hz
DAW slaved to CC1
DAW (master)
CC1
JitterperformanceofawellknownDAWconverter










