System User Guide / Owners Manual

externalsyncsignalandputsoutasignalwhenthelocaloscillatorrunstoofastor

tooslow.

Now,thePLLwilltracktheexternalsyncclosely,butnottooclosely.Unwantedfluc-

tuations(jitter)oftheexternalsyncsignalaretobeignoredbutifthelocaloscil-

latordriftsoffitshouldbepulledbackintostep.SohowdoesthePLLtellthedif-

ference?Itcan’t.Itseesonlythedifferencebetweenthetwoclocks.Allitcandois

ignoreshorttermdifferences(high-frequencyjitter),whilsttrackingslowerfluctua-

tions(low-frequencyjitter).Afterall,aslowchangecouldbeduetodriftingofeither

theexternalsyncsignalorthelocaloscillator.Eitherway,thePLLmustgetthelocal

oscillatortofollowthesyncatlonglast,lestlockbelost.

Thecut-offpointbetween“slow”errorsand“fast”errors(knownasthe“PLLband-

width”)ischosenbythedesigner,basedonanassumptionofhowstablethelocal

oscillatoriscomparedtotheexternalsyncsignal.Abovethecut-offpoint,thePLL

willnotreproduceanyerrorspresentintheinput,butneitherwillitbeabletocor-

recterrorscommittedbyitsownlocaloscillator.

Here’sthetransferofabasicPLL,designedtohaveacut-offfrequencyof4kHz.

Markthatinthisgraphwearenotlookingataudiofrequencies,butatjitter(or

‘fluctuation’)frequencies.Thebluecurveshowstheattenuationofinputjitter.The

redcurveshowstheattenuationofthelocaloscillator’sjitter.Belowthecut-offfre-

quencytheexternaloscillatorsjitterdominates,abovecut-offthelocaloscillators’.

Acut-offfrequencyat4kHzorhighercanbefoundinAES/EBUreceiversandgener-

alwordclockinputs.Ifheregardsthequalityofhislocalclockhighly,thedesigner

ofaPLLcandecidetoputthecut-offpointmuchlower,forinstanceat10Hzor

evenfurtherdown.Thismakesfora‘slow’PLLwithaverynarrowbandwidth.

AquickwayofseeingifaPLLissloworfastistoseehowlongittakestoachieve

lock.Usually,slowPLL’salsotakeawhiletolock.TheCC1takesabout40seconds

Attenuationofinput(blue)andlocal(red)jitterbyaPLL