Data Sheet

Table Of Contents
47
2545K–AVR–04/07
ATmega48/88/168
Figure 9-3. MCU Start-up, RESET Extended Externally
9.4 External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see ”System and Reset Characteristics” on page 307) will generate a
reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
When the applied signal reaches the Reset Threshold Voltage – V
RST
– on its positive edge, the
delay counter starts the MCU after the Time-out period – t
TOUT
has expired. The External Reset
can be disabled by the RSTDISBL fuse, see Table 26-6 on page 287.
Figure 9-4. External Reset During Operation
9.5 Brown-out Detection
ATmega48/88/168 has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
CC
level during operation by comparing it to a fixed trigger level. The trigger level for the BOD can
be selected by the BODLEVEL Fuses. The trigger level has a hysteresis to ensure spike free
Brown-out Detection. The hysteresis on the detection level should be interpreted as V
BOT+
=
V
BOT
+ V
HYST
/2 and V
BOT-
= V
BOT
- V
HYST
/2.When the BOD is enabled, and V
CC
decreases to a
value below the trigger level (V
BOT-
in Figure 9-5), the Brown-out Reset is immediately activated.
When V
CC
increases above the trigger level (V
BOT+
in Figure 9-5), the delay counter starts the
MCU after the Time-out period t
TOUT
has expired.
The BOD circuit will only detect a drop in V
CC
if the voltage stays below the trigger level for
longer than t
BOD
given in ”System and Reset Characteristics” on page 307.
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC
CC