Data Sheet

35
2545K–AVR–04/07
ATmega48/88/168
7.8 External Clock
To drive the device from an external clock source, XTAL1 should be driven as shown in Figure
7-4 on page 35. To run the device on an external clock, the CKSEL Fuses must be programmed
to “0000” (see Table 7-12).
Figure 7-4. External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table 7-13.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to ”System Clock Prescaler” on page
36 for details.
7.9 Clock Output Buffer
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
Table 7-12. Crystal Oscillator Clock Frequency
Frequency CKSEL3..0
0 - 20 MHz 0000
Table 7-13. Start-up Times for the External Clock Selection
Power Conditions
Start-up Time from Power-
down and Power-save
Additional Delay from
Reset (V
CC
= 5.0V) SUT1..0
BOD enabled 6 CK 14CK 00
Fast rising power 6 CK 14CK + 4.1 ms 01
Slowly rising power 6 CK 14CK + 65 ms 10
Reserved 11
NC
EXTERNAL
CLOCK
SIGNAL
XTAL2
XTAL1
GND