Google Coral DEV Board Mini 2 GB 4 x 1.5 GHz : Data Sheet : Page 9





4.4 Mono speaker terminal 



This is a 2

-

pin 2

.

54 mm

-

pitch terminal connector for a 4

Ω

/

8

Ω

mono speaker

(

up to 1 W

).

Wire polarity is indicated in

ﬁ

gure 4

.



Figure 4.

Mono speaker terminal 



4.5 Headphone jack 



This is a CTIA compliant audio jack

.

It supports stereo audio output and mono microphone input

.

By default

,

the 

microphone expects analog input

.

You can recon

ﬁ

gure the mux to use a digital microphone like this

:



To make this permanent across boots

,

you should update the

EnableSequence

for the

"Headphone"

con

ﬁ

guration in 

/usr/share/alsa/ucm/excelsior-card/HiFi.conf

.



4.6 Microphone 



This is an on

-

board digital PDM microphone

.

It shares the same capture device as the headphone jack

,

using the 

headphone jack as a switch

.

That is

,

if you plug in a headphone

,

this PDM microphone is disabled

.



4.7 Micro HDMI port 



This port supports HDMI 1

.

4a with a micro connector

,

and a resolution up to 1920x1080

.



4.8 MicroSD slot 



The microSD card supports SD

/

SDHC

/

MMC

(

card capacities up to 32 GiB

)

and meets the SDIO 2

.

0

/

3

.

0 standard to provide 

expanded memory for the system

.

Insert the card with the contacts facing up

(

toward the board

).



4.9 GPIO header 



All GPIO pins can be con

ﬁ

gured for input or output

.

The Mendel system image includes a default con

ﬁ

guration to enable 

PWM

,

I2C

,

and UART on some pins

.

For details about the default pin con

ﬁ

guration

,

see table 6

.



You can interact with each pin using standard Linux interfaces such as device

ﬁ

les

(

/dev

)

and sysfs

ﬁ

les

(

/sys

).

For more 

information

,

see the guide to Connect to the Dev Board Mini I

/

O pins

.



The default driving current for most GPIO pins is 2

-

4 mA

.

If you need a stronger current

(

up to 16 mA

)

or want to change the 

default state

(

shown in table 7

),

you can provide a device tree overlay

.

However

,

pins 8

,

10

,

29

,

31

,

and 37 are routed 

through a level shifter with a weak

ﬁ

xed pull

-

up that reduces their drive strength

,

so should not drive resistive loads directly

.



For information about the header pins voltage levels and logic thresholds

,

see section 3 Electrical speci

ﬁ

cations

.



Dev Board Mini datasheet v1

.

1 

G650

-

03324

-

01 



amixer -c 0 cset name="AIF TX Mux" 1



Coral

.

ai

|

.

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9 