User's Manual

xam1
uypvwincml8vcyp7azhga8189kcblgwl8g12a4v3hp-i72ogizr * Global Network Lighting &
Con
MARVELL CONFIDENTIAL, UNDER NDA# 12150208
m1u
ypvwincml8vcyp7azhga8189kcblgwl8g12a4v3hp-i72ogizr * Global Network Lighting & Con
trol In
MARVELL CONFIDENTIAL, UNDER NDA# 12150208
2fdrxam1uypvwincml8vcyp7azhga8189kcblgwl8g12a4v3hp-i72ogizr * Globa
l Net
Package
Pin Description
Copyright © 2015 Marvell CONFIDENTIAL Doc. No. MV-S109936-00 Rev. A
February 3, 2015, 1.00 Document Classification: Proprietary Page 63
Table 12: Clock/Control Interface
1
88-Pin 68-Pin Pin/Signal
Name
Type Supply Description
26 21 XTAL_IN A, I AVDD18 Crystal Oscillator Input
27 22 XTAL_OUT A, O AVDD18 Crystal Oscillator Output
Connect to ground when an external oscillator used.
GPIO_25 XTAL32K_IN A, I VDDIO_AON 32.768 kHz Crystal Input
GPIO_26 XTAL32K_OUT A, O VDDIO_AON 32.768 kHz Crystal Output
GPIO_22 WAKE_UP0 I VDDIO_AON Wake-Up 0
GPIO_23 WAKE_UP1 I VDDIO_AON Wake-Up 1
GPIO_4
GPIO_16
AUDIO_CLK VDDIO_0 Audio Clock
AUPLL audio clock output provided by audio PLL for
external codec.
45 35 RESETn I VDDIO_AON Chip Reset (active low)
1. The XTAL32K_IN/OUT and WAKE_UP0/1 signals are muxed on GPIO pins. See Table 11, GPIO Interface, on page 53 for GPIO muxing.