User's Manual

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Con
MARVELL CONFIDENTIAL, UNDER NDA# 12150208
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MARVELL CONFIDENTIAL, UNDER NDA# 12150208
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Package
Pin Description
Copyright © 2015 Marvell CONFIDENTIAL Doc. No. MV-S109936-00 Rev. A
February 3, 2015, 1.00 Document Classification: Proprietary Page 51
GPIO_38 -- SSP1_TXD O VDDIO_3 SSP 1 TXD
GPIO_39 SSP1_RXD I VDDIO_3 SSP 1 RXD
GPIO_42 SSP1_CLK I/O VDDIO_3 SSP 1 Serial Clock
GPIO_43 SSP1_FRM I/O VDDIO_3 SSP 1 Frame Indicator
GPIO_44 SSP1_TXD O VDDIO_3 SSP 1 TXD
GPIO_45 SSP1_RXD I VDDIO_3 SSP 1 RXD
GPIO_7 SSP2_CLK I/O VDDIO_0 SSP 2 Serial Clock
GPIO_8 SSP2_FRM I/O VDDIO_0 SSP 2 Frame Indicator
GPIO_9 SSP2_TXD O VDDIO_0 SSP 2 TXD
GPIO_10 SSP2_RXD I VDDIO_0 SSP 2 RXD
GPIO_46 SSP2_CLK I/O VDDIO_3 SSP 2 Serial Clock
GPIO_47 SSP2_FRM I/O VDDIO_3 SSP 2 Frame Indicator
GPIO_48 SSP2_TXD O VDDIO_3 SSP 2 TXD
GPIO_49 SSP2_RXD I VDDIO_3 SSP 2 RXD
1. All SSP signals are muxed on GPIO pins. See Table 11, GPIO Interface, on page 53 for GPIO muxing.
Table 8: SSP Interface
1
(Continued)
88-Pin 68-Pin Pin Name Type Supply Description