User's Manual

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Con
MARVELL CONFIDENTIAL, UNDER NDA# 12150208
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MARVELL CONFIDENTIAL, UNDER NDA# 12150208
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88MW300/302
Datasheet
Doc. No. MV-S109936-00 Rev. A CONFIDENTIAL Copyright © 2015 Marvell
Page 48 Document Classification: Proprietary February 3, 2015, 1.00
GPIO_37 -- UART0_RTSn O VDDIO_3 UART 0 RTSn (active low)
GPIO_27 UART0_TXD O VDDIO_3 UART 0 TXD
GPIO_11 -- UART1_CTSn I VDDIO_0 UART 1 CTSn (active low)
GPIO_12 -- UART1_RTSn O VDDIO_0 UART 1 RTSn (active low)
GPIO_13 -- UART1_TXD O VDDIO_0 UART 1 TXD
GPIO_14 -- UART1_RXD I VDDIO_0 UART 1 RXD
GPIO_35 -- UART1_CTSn I VDDIO_3 UART 1 CTSn (active low)
GPIO_36 -- UART1_RTSn O VDDIO_3 UART 1 RTSn (active low)
GPIO_38 -- UART1_TXD O VDDIO_3 UART 1 TXD
GPIO_39 UART1_RXD I VDDIO_3 UART 1 RXD
GPIO_42 UART1_CTSn I VDDIO_3 UART 1 CTSn (active low)
GPIO_43 UART1_RTSn O VDDIO_3 UART 1 RTSn (active low)
GPIO_44 UART1_TXD O VDDIO_3 UART 1 TXD
GPIO_45 UART1_RXD I VDDIO_3 UART 1 RXD
GPIO_7 UART2_CTSn I VDDIO_0 UART 2 CTSn (active low)
GPIO_8 UART2_RTSn O VDDIO_0 UART 2 RTSn (active low)
GPIO_9 UART2_TXD O VDDIO_0 UART 2 TXD
GPIO_10 UART2_RXD I VDDIO_0 UART 2 RXD
GPIO_46 UART2_CTSn I VDDIO_3 UART 2 CTSn (active low)
GPIO_47 UART2_RTSn O VDDIO_3 UART 2 RTSn (active low)
GPIO_48 UART2_TXD O VDDIO_3 UART 2 TXD
GPIO_49 UART2_RXD I VDDIO_3 UART 2 RXD
1. All UART signals are muxed on GPIO pins. See Table 11, GPIO Interface, on page 53 for GPIO muxing.
Table 6: UART Interface
1
88-Pin 68-Pin Signal Name Type Supply Description