Manual

Users Manual Model 3600
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stored in high-speed memory according to appointed addresses.
Selecting the internal clock timing sampling will set the cycle of the
sampling clock. State sampling with the external clock will select the
phase of the sampling clock.
During the sampling storage period, a “sequence add 1 counter ”
supplies the storage address for the high-speed memory in the memory
control circuit, each sampling clock makes the memory change to a new
writing address. At the same time the ip-latch sends new sampling
data, creating a new data point stored in memory. The start-up and
end of the address counter is determined by the memory control
circuit according to the parameters set by the triggering process. After
sampling storage, the microcontroller unit reads a series of data and
sends them to the LCD to display the timing waveform and data list.
High-speed
comparator
Threshold
voltage
Sampling circuitHigh-speed
memory
Read / write data Sampling rateRead / write dataMCUTrigger processExternal signal Storage address
generator
Clock circuitKeyboard InputInternal code
generator
Model 3600 User Manual_B.indd 3 7/2/2010 4:41:40 PM