User's Manual
Table Of Contents
- 1 Device Overview
- Table of Contents
- 2 Revision History
- 3 Device Characteristics
- 4 Terminal Configuration and Functions
- 5 Specifications
- 6 Detailed Description
- 6.1 Overview
- 6.2 System Block Diagram
- 6.3 Power Supplies
- 6.4 Receiver – Analog Section
- 6.5 Receiver – Digital Section
- 6.6 Oscillator Section
- 6.7 Transmitter – Analog Section
- 6.8 Transmitter – Digital Section
- 6.9 Transmitter – External Power Amplifier and Subcarrier Detector
- 6.10 TRF7970A IC Communication Interface
- 6.11 Special Direct Mode for Improved MIFARE Compatibility
- 6.12 NFC Modes
- 6.13 Direct Commands from MCU to Reader
- 6.13.1 Command Codes
- 6.13.1.1 Idle (0x00)
- 6.13.1.2 Software Initialization (0x03)
- 6.13.1.3 Initial RF Collision Avoidance (0x04)
- 6.13.1.4 Response RF Collision Avoidance (0x05)
- 6.13.1.5 Response RF Collision Avoidance (0x06, n = 0)
- 6.13.1.6 Reset (0x0F)
- 6.13.1.7 Transmission With CRC (0x11)
- 6.13.1.8 Transmission Without CRC (0x10)
- 6.13.1.9 Delayed Transmission With CRC (0x13)
- 6.13.1.10 Delayed Transmission Without CRC (0x12)
- 6.13.1.11 Transmit Next Time Slot (0x14)
- 6.13.1.12 Block Receiver (0x16)
- 6.13.1.13 Enable Receiver (0x17)
- 6.13.1.14 Test Internal RF (RSSI at RX Input With TX ON) (0x18)
- 6.13.1.15 Test External RF (RSSI at RX Input with TX OFF) (0x19)
- 6.13.1.16 Receiver Gain Adjust (0x1A)
- 6.13.1 Command Codes
- 6.14 Register Description
- 7 Application Schematic and Layout Considerations
- 8 Device and Documentation Support
- 9 Mechanical Packaging and Orderable Information
GND
1500pF
1500pF
1200pF
1200pF
10pF
680pF100pF 220pF
680pF
150nH330nH
GND
GND
27pF
GND
GNDGND
2.2uF
0.01uF
2.2uF
0.01uF
GND
GND
2.2uF0.01uF
GND
2.2uF
0.01uF
GND
27pF
GND
27pF
GND
1.5uH
68pF
GND
12pF
12pF
6.8k
GND
GND
10k
GND
GND
GND
47k
0.1uF
100R
GND
GND
MC-921
GND
0
0
SMA-142-0701-801/806
GND
057-014-2
2.2uF
0.01uF
GND
C2
C3
C4
C5
C6
C7C10 C8
C9
L1L2
C11
C16
C15
C20
C19
C18
C17
C22
C21
C23
C24
L3
C14
C13
C12
R1
TCK
TMS
P4.0/TB0
P4.1/TB1
P4.2/TB2
P4.3/TB0
P4.4/TB1
P4.5/TB2
P4.6/TBOUTH/ACLK
P4.7/TBCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21 20
19
18
17
16
15
29
30
31
32
33
34
35
36
37
38
TP
39
40
R6
R5
C1
R4
X2
R2
R3
GND1
2
IN
1
GND2
4
OUT
3
X3
VDD_X
32
OSC_IN
31
OSC_OUT
30
VSS_D
29
EN
28
SYS_CLK
27
DATA_CLK
26
EN2
25
I/O_7
24
I/O_6
23
I/O_5
22
I/O_4
21
I/O_3
20
I/O_2
19
VDD_A
1
VIN
2
VDD_PA
4
TX_OUT
5
VSS_PA
6
VDD_RF
3
I/O_1
18
I/0_0
17
BAND_GAP
11
VDD_I/O
16
VSS_A
15
MOD
14
IRQ
13
ASK/OOK
12
VSS_RX
7
RX_IN1
8
VSS
10
RX_IN2
9
GND(PA D)
33
X4-1 X4-2
X4-3 X4-4
X4-5 X4-6
X4-7 X4-8
X4-9 X4-10
X4-11 X4-12
X4-13 X4-14
C25C26
SYS_CLK
SYS_CLK
DATA _CLK
DATA _CLK
VIN
VIN
IRQ
IRQ
MOD
MOD
VDD_X
VDD_X
RST_NMI
RST_NMI
RST_NMI
TCK
TCK
TMS
TMS
TDI
TDI
TDO/TDI
TDO/TDI
VCC
VCC
VCC
VCC
RXD
TXD
ASK/OOK
ASK/OOK
EN
EN
OSC_OUT
OSC_OUT
OSC_IN
OSC_IN
JTAG
(+2.7VDC - 5.5VDC)
TRF7970A
TRF7970A
www.ti.com
SLOS743K –AUGUST 2011–REVISED APRIL 2014
7 Application Schematic and Layout Considerations
7.1 TRF7970A Reader System Using Parallel Microcontroller Interface
7.1.1 General Application Considerations
Figure 7-1 shows the most flexible TRF7970A application schematic. Both ISO15693, ISO14443 and
FeliCa systems can be addressed. Due to the low clock frequency on the DATA_CLK line, the parallel
interface is the most robust way to connect the TRF7970A with the MCU.
Figure 7-1 shows matching to a 50- Ω port, which allows connecting to a properly matched 50-Ω antenna
circuit or RF measurement equipment (for example, a spectrum analyzer or power meter).
7.1.2 Schematic
Figure 7-1 shows a sample application schematic for a parallel MCU interface.
Figure 7-1. Application Schematic – Parallel MCU Interface
An MSP430F2370 (32KB Flash, 2KB RAM) is shown in Figure 7-1. Minimum MCU requirements depend
on application requirements and coding style. If only one ISO protocol or a limited command set of a
protocol needs to be supported, MCU Flash and RAM requirements can be significantly reduced. Be
aware that recursive inventory and anticollision commands require more RAM than single slotted
operations. For example, current reference firmware for ISO15693 (with host interface) is approximately
8KB, using 512B RAM; for all supported protocols (also with same host interface) the reference firmware
is approximately 12KB and uses a minimum of 1KB RAM. An MCU capable of running its GPIOs at
13.56 MHz is required for Direct Mode 0 operations.
Copyright © 2011–2014, Texas Instruments Incorporated Application Schematic and Layout Considerations 75
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